Veri-Sure

by xyjoey · indexed from github

[NeurIPS 2026] Veri-Sure: Multi-Agent RTL Code Generation with Temporal Tracing, Slicing and Formal Verification

Writing RTL is different from writing software: hardware description languages describe concurrent behavior with strict cycle-level timing. LLM-based RTL generation is therefore held back by (i) sparse feedback and limited test coverage from simulation-only evaluation, (ii) regressions and repair hallucinations from regenerating the whole file during debugging, and (iii) semantic drift as intent is reinterpreted across repair iterations and agent handoffs.

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